wide supply range, rail - to - rail output instrumentation amplifier preliminary technical data ad8420 rev. prd information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specif ications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2011 analog devices, inc. all rights reserved. features gain set with 2 external resistors gain range: 1 to 1000 input voltage goes below ground very wide power supply range single supply: 2. 7 v to 36v dual supply: +/ - 2. 7 v to+/ - 18v bandwidth (g=100): 2.5 khz input noise: 50 nv/ hz max supply current: 9 0 a max offset voltage: 200 uv max differential input voltage: 1v min cmrr: 10 0 db msop - 8 package applications bridge amplifiers pressure measurement medical instrumentation portab le data acquisition multi channel systems pin configuration top view (not to scale) ?in 1 nc 2 3 +in 4 +v s 8 v out 7 ref 6 ?v s 5 ad8420 fb figure 1. table 1 . instrumentation amplifiers by category 1 general purpose zero drift military grade low power digital gain ad8221 / 2 ad8231 ad620 ad8420 ad8250 ad8220 / 4 ad8290 ad621 ad8235 / 6 ad8251 ad8228 ad8293 ad524 ad627 ad8253 ad8295 ad8553 ad526 ad8226 / 7 ad8231 ad8556 ad624 ad623 ad8557 ad8223 1 see www.analog.com for the latest instrumentation amplifiers. general description the ad8420 is a low cost, wide supply range amplifier that uses two resistors to set any gain between 1 and 1000. it is optimized to amplify small differential voltage s in the presence of large common mode signals. the ad8420 is based on a current mode architecture that gives it excellent input common mode range. unlike conventional instrumentation amplifiers, the ad8420 can easily amplify signals at or even slightly below ground without requiring dual supplies. the ad8420 has a full rail to rail output, and the output voltage is completely independent of the input common mode voltage. the ad8420 can operate off both single or dual supplies. it works well for a port able system with a l imite d single supply voltage and equally well for a system using large dual supplies. gain is set using the ratio of two resistors. a reference pin allows the user to offset the output voltage. this feature is useful when the output signal needs to be centered around a specific voltage, such as mid - supply. the ad8420 is available in an 8 pin msop package. performance is specified over the full temperature range of ?40c to + 8 5 c. part is operational from ?40c to + 125c
ad8420 preliminary technical data rev. prd | page 2 of 2 specifications +v s = + 5 v, ? v s = 0 v, v ref = 0 v, v in+ = 0 v, v in - = 0 v, t a = 25 c , g = 1 to 1000, r l = 20 k , specifications referred to input, unless otherwise noted table 2 . parameter conditions min typ max unit common - mode rejection ratio (cmrr) v cm = 0 v to 2.7 v c mrr dc to 60 hz 100 db cmrr at 1 khz db noise voltage noise spectral density f = 1 khz, v diff 100 mv 50 nv/ hz peak to peak f = 0.1 hz to 10 hz , v diff 100 mv 1.5 v p - p current no ise spectral density f = 1 khz fa/ hz peak to peak f = 0.1 hz to 10 hz pa p - p voltage offset offset 200 v average temperature coefficient t a = ?40 c to + 85 c 1 v/c offset rti vs. supply (psr) db input s valid for ref & fb pair, as well as +in & - in i nput bias current 1 t a = +25 c 25 4 0 na t a = +8 5 c na t a = ?40 c na average temperature coefficient t a = ?40 c to + 85 c pa/c input offset current t a = +25 c 1 na t a = + 85 c na t a = ?4 0 c na average temperature coefficient t a = ?40 c to + 85 c pa/c input impedance differen tial 130||2 m ||pf common mode 1000||2 m ||pf differential input operating voltage t a = C 40c to + 85 c - 1 1 v input op erating voltage (+in, - in, or ref) t a = +25c ?v s C 0.15 +v s ? 2.2 v t a = +8 5 c ?v s C 0.05 +v s C 1.8 v t a = C 40c ?v s C 0.2 +v s C 2.7 v dynamic response small signal C 3 db bandwidth g = 1 250 khz g = 10 25 khz g = 100 2.5 khz g =1000 0.25 khz settling time 0.01% 4 v step g = 10 s g = 100 s g = 1000 s slew rate exceeds bandwidth limit v/s
preliminary technical data ad8420 rev. prd | page 3 of 3 gain 2 g = 1 + ( r2 /r 1) gain range 1 1000 v/v gain err or v out = 0.2v to 4.8v 0.05 % gain vs. temperature t a = ?40 c to + 85 c 10 ppm/c output o utput swing r l = 10 k to mid supply t a = +25c ?v s + 0.15 +v s C 0.15 v t a = + 85 c v t a = C 40c v r l = 10 0 k to mid supply t a = +25c ?v s + 0.1 +v s C 0.1 v t a = +8 5 c v t a = C 40c v short - circuit current 10 ma p ower supply operating range single supply operation 3 2.7 36 v quiescen t current t a = +25c 75 90 a t a = C 4 0c a t a = +85c a t a = + 85 c 100 a temperature range specified ?40 + 85 c operational 4 ?40 + 125 c 1 the input stage uses pnp transistors, so input bias current always flows out of the part. 2 for g>1, errors from external resistors r1 and r2 should be added to these specifications, including error from fb pin bias c urrent. 3 minimum supply voltage ind icated for v +in , v - in , v ref = 0v. . 4 see typical performance curves for operation between 85 c and 125c
ad8420 preliminary technical data rev. prd | page 4 of 4 +v s = + 15 v, ? v s = ? 15 v, v ref = 0 v, t a = 25 c , g = 1 to 1000 , r l = 2 0 k , specifications referred to input, unless otherwise noted table 3 . parameter conditions min typ max unit common - mode rejection ratio (cmrr) v cm = C 10 v to +10 v cmrr dc to 60 hz 100 db cmrr at 1 khz db noise voltage noise spectral density f = 1 khz, v diff 100 mv 50 nv/ hz peak to peak f = 0.1 hz to 10 hz , v diff 100 mv 1.5 v p - p current noise spectral density f = 1 khz fa/ hz peak to peak f = 0.1 hz to 10 hz pa p - p v oltage offset offset v s = 5 v to 15 v 200 v average temperature coefficient t a = ?40 c to + 85 c 1 v/c offset r ti vs. supply (psr) db input s valid for ref & fb pair, as well as +in & - in i nput bias current 1 t a = +25 c 25 40 na t a = + 85 c na t a = ?40 c na average temperature coefficient t a = ?40 c to + 85 c pa/c input offset current t a = +25 c 1 na t a = + 85 c na t a = ?4 0 c na average temperature coefficient t a = ?40 c to + 85 c pa/c input impedance differen tial 130||3 m ||pf common mode 1000||3 m ||pf differential input operating voltage t a = C 40c to + 85 c - 1 1 v input op erating voltage (+in, - in, or ref) t a = +25c ?v s C 0.15 +v s ? 2.2 v t a = + 85 c ?v s C 0.05 +v s C 1.8 v t a = C 40c ?v s C 0.2 +v s C 2.7 v d ynamic response check voltage differential small signal C 3 db bandwidth g = 1 250 khz g = 10 25 khz g = 100 2.5 khz g =1000 0.25 khz settling time 0.01% 10 v step g = 1 s g = 10 s g = 100 s g = 1000 s slew rate exceeds bandwidth limit v/s
preliminary technical data ad8420 rev. prd | page 5 of 5 gain 2 g = 1 + ( r 2/r 1) g ain range 1 1000 v/v gain error v out 10 v 0.05 % gain nonlinearity v out = C 10 v to +10 v g = 1 to 10 r l 20 k ppm g = 100 r l 20 k ppm g = 1000 r l 20 k ppm gain vs. temperature t a = ?40 c to + 85 c 10 ppm/c output o utput swing r l = 20 k to ground t a = +25c ?v s + 0.15 +v s C 0.15 v t a = + 85 c v t a = C 40c v r l = 10 0 k to ground t a = +2 5c ?v s + 0.1 +v s C 0.1 v t a = + 85 c v t a = C 40c v short - ci rcuit current 10 ma p ower supply operating range dual supply operation 3 2. 7 18v v quiescen t current t a = +25c 75 90 a t a = C 40c a t a = +85c 100 a temperat ure range specified ?40 + 85 c opera tional 4 ?40 + 125 c 1 the input stage uses pnp transistors, so input bias current always flows out of the part. 2 for g> 1, errors from external resistors r1 and r2 should be added to these specifications, including error from fb pin bias current 3 minimum positive supply voltage indicated for v +in , v - in , v ref = 0v. with v +in , v - in , v ref = - vs, minimum supply is 1.35v. 4 see typical performance curves for operation between 85 c and 125c
ad8420 preliminary technical data rev. prd | page 6 of 6 absolute maximum rat ings table 4 . parameter rating supply voltage 18 v output short - circuit current indefinite maximum voltage at ? in or +in C vs + 40v minimum voltage at ? in or +in +vs C 40v maximum voltage at ref +vs + 0.2v minimum voltage at ref C vs C 0.2v storage temperature range ?65c to +150c esd human body model charge device model machine model stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rat ing conditions for extended periods may affect device reliability. thermal resistance ja is specified for a device in free air. table 5 . package ja unit 8 - lead msop, 4 - layer jedec board 135 c/w esd caution
preliminary technical data ad8420 rev. prd | page 7 of 7 pin configuration an d function descripti ons top view (not to scale) ?in 1 nc 2 3 +in 4 +v s 8 v out 7 ref 6 ?v s 5 ad8420 fb figure 2 . pin configuration table 6 . pin function descriptions pin no. mnemonic description 1 nc this pin not connected internally. for best cmrr vs. frequency and leakage performance , connect this pin to negative supply. 2 +in positive input. 3 ?in negative input 4 ?v s negative supply. 5 +v s positive supply. 6 ref reference. 7 fb feedback . 8 v out output.
ad8420 preliminary technical data rev. prd | page 8 of 8 theory of o peration ?in +in ref fb v i v i v out esd and ove r vo lt age protection esd and ove r vo lt age protection +vs ?vs +vs ?vs r2 r1 a1 a2 a3 v bias figure 3 . simplified schematic architecture the ad8420 consists of three amplifiers: two matched transconductance amplifiers that convert voltage to current and one integrator amplifier that converts current to voltage. the ad8420 works as follows: assume a dif ferential voltage is app lied across inputs +in and - in . this input voltage is converted i nto a current by amplifier a1. this will create a difference in current between a1 and a2, which is fed into a3. a3s output voltage will change until a2 sinks all the current a1 is gener ating. because the gain of a1 and a2 are matched, this means the differential input voltage across a1 will appear across the inputs of a2. gain is set by the ratio of r 2 to r 1 . because the ad8420 converts the input differential signals to a current, the re are no internal headroom issues as with traditional instrumentation amplifier architectures. this is particularly important when amplifying a signal with a common mode voltage near one of the supply rails. to improve robustness and ease of use, t he ad8 420 includes overvoltage protection on its inputs. this protection scheme allows input voltages well beyond the supply rails (as well as wide differential input voltages) without damaging the part . setting the gain t he transfer function of the ad84 2 0 is v out = g ( v in+ ? v in ? ) + v ref where: 1 r2 1 r g + = table . suggested resistors for various gains - 1 resistors r1 (k ) r2 (k ) gain none short 1 .00 49.9 49.9 2.00 20 80.6 5.0 3 10 90.9 10.09 5 95.3 20. 06 2 97.6 49. 8 1 100 101 1 200 201 1 499 50 0 1 100 0 1001 while the ratio of r2 to r1 set s the gain, the absolute value of the resistors is up to the designer. larger values reduce power consumption and output loading; smaller values limit fb input bias current error. a method that allows large value feedback resistors while limiting fb bias current error is to place a resistor of value r1||r2 in series with the ref terminal as shown in figure 4 . at higher gains, this resistor can simply be the same value as r1. ?in +in v ref r2 r1 g = 1+ r2 r1 ad8420 v out ref fb r1||r2 figure 4 . cancelling out error from fb input bias current
preliminary technical data ad8420 rev. prd | page 9 of 9 input voltage range unlike traditional instrumentation amplifier architectures, the allowed input range of the ad8420 is simplicity itself. for the ad8420s transfer function to be valid, t he input volt age should follow two rules: 1) keep d ifferential input voltage within 1 v. 2) keep voltage on +in, - in, and ref pins in specified input voltage range no hexagonal figures. no complicated formulas. input protection the ad8420 has very robust inputs and typically does not need additional input protection. input voltages can be up to 40 v from the opposite supply rail. for example, with a +5 v positive supply and a ?8 v negative supply, the part can safely withstand voltages from ?35 v to 32 v. t he part can handle large differential input voltages , even when the part is in high gain , without damage . the rest of the ad842 0 terminals should be kept within the supplies. all terminals of the ad8426 are protected against esd . f or applications that require protection beyond the ad8420 s limits, place diodes at the ad8420 inputs to limit voltage and resistors in series with the inputs to limit the current into these diodes. to keep input bias current at minimum, low leakage diode clamps such as the bav199 should be used. the ad8420 also combines well with tvs diodes such as the ptvsxs1ur . driving the referenc e pin traditional instrumentation amplifier architectures require the reference pin to be driven with a low impedance source. i n traditional architectures, impedance at the reference pin degrades both cmrr and gain accuracy. with the ad8420 architecture, resistance at the reference pin has no effect on cmrr. ?in +in v ref r ref r2 r1 g = 1+ r2+r ref r1 ad8420 v out ref fb figure 5 . calculating gain with reference resistance r esistance at the reference pin does affect the ad8420s gain, but if this resistance is constant, the gain setting resistors can be adjusted to compensate. for example, the ad8420 can be driven with a voltage divider as shown in figure 6 . ?in +in v s r2 r1 g = 1+ r2+r3||r4 r1 ad8420 v out ref fb r4 r3 optional capacitor filters noise from vs figure 6 . using resistor divider to set reference voltage
ad8420 preliminary technical data rev. prd | page 10 of 10 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 7. 8- lead mi ni small outline package [msop] (rm - 8) dimensions shown in millimeters ordering guide model 1 temperature range package description package branding ad8420 a rmz ?40c to + 125 c standard grade , tube msop y3y ad8420 a rmz -r7 ?40c to + 125 c standard grade , 7 inch tape and reel msop y3y ad8420 a rmz -rl ?40c to + 125 c standard grade , 13 inch tape and reel msop y3y ad8420 brmz ?40c to + 125 c high performance grade , tube msop y3z ad8420 brmz -r7 ?40c to + 125 c high performance grade , 7 inch tape and reel msop y3z ad8420 brmz -rl ?40c to + 125 c high performance grade , 13 inch tape and reel msop y3z 1 z = rohs compliant part.
|
